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Flash memory is a form of non-volatile computer memory that can be electrically erased and reprogrammed. Unlike EEPROM, it is erased and programmed in blocks consisting of multiple locations (in early flash the entire chip had to be erased at once). Flash memory costs far less than EEPROM and therefore has become the dominant technology wherever a significant amount of non-volatile, solid-state storage is needed. Examples of applications include digital audio players, digital cameras and mobile phones. Flash memory is also used in USB flash drives (thumb drives), which are used for general storage and transfer of data between computers. It has also gained some popularity in the gaming market, where it is often used instead of EEPROMs for game save data.
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Overview
Flash memory is non-volatile, which means that it does not need power to maintain the information stored in the chip. In addition, flash memory offers fast read access times (though not as fast as volatile DRAM memory used for main memory in PCs) and better shock resistance than hard disks. These characteristics explain the popularity of flash memory for applications such as storage on battery-powered devices. Another allure of flash memory is that when packaged in a 'memory card', it is nearly indestructible by physical means, being able to withstand intense pressure and boiling water1.
Principles of operation
Flash memory stores information in an array of floating gate transistors, called "cells", each of which traditionally stores one bit of information. Newer flash memory devices, sometimes referred to as multi-level cell devices, can store more than 1 bit per cell, by using more than two levels of electrical charge, placed on the floating gate of a cell.
In NOR flash, each cell looks similar to a standard MOSFET, except that it has two gates instead of just one. One gate is the control gate (CG) like in other MOS transistors, but the second is a floating gate (FG) that is insulated all around by an oxide layer. The FG is between the CG and the substrate. Because the FG is isolated by its insulating oxide layer, any electrons placed on it get trapped there and thus store the information. When electrons are on the FG, they modify (partially cancel out) the electric field coming from the CG, which modifies the threshold voltage (Vt) of the cell. Thus, when the cell is "read" by placing a specific voltage on the CG, electrical current will either flow or not flow, depending on the Vt of the cell, which is controlled by the number of electrons on the FG. This presence or absence of current is sensed and translated into 1's and 0's, reproducing the stored data. In a multi-level cell device, which stores more than 1 bit of information per cell, the amount of current flow will be sensed, rather than simply detecting presence or absence of current, in order to determine the number of electrons stored on the FG.
A NOR flash cell is programmed (set to a specified data value) by starting up electrons flowing from the source to the drain, then a large voltage placed on the CG provides a strong enough electric field to suck them up onto the FG, a process called hot-electron injection. To erase (reset to all 1's, in preparation for reprogramming) a NOR flash cell, a large voltage differential is placed between the CG and source, which pulls the electrons off through quantum tunneling. In single-voltage devices (virtually all chips available today), this high voltage is generated by an on-chip charge pump. Most modern NOR flash memory components are divided into erase segments, usually called either blocks or sectors. All of the memory cells in a block must be erased at the same time. NOR programming, however, can generally be performed one byte or word at a time.
NAND Flash uses tunnel injection for writing and tunnel release for erasing. NAND flash memory forms the core of the removable USB interface storage devices known as USB flash drives.
As manufacturers increase the density of flash devices, individual cells shrink and the number of electrons in any cell becomes very small. Coupling between adjacent floating gates can change the cell write characteristics. New designs, such as charge trap flash, attempt to provide better isolation between adjacent cells.
History
Flash memory (both NOR and NAND types) was invented by Dr. Fujio Masuoka while working for Toshiba in 1984. According to Toshiba, the name 'Flash' was suggested by Dr. Masuoka's colleague, Mr. Shoji Ariizumi, because the erasure process of the memory contents reminded him of a flash of a camera. Dr. Masuoka presented the invention at the IEEE 1984 International Electron Devices Meeting (IEDM) held in San Jose, California. Intel saw the massive potential of the invention and introduced the first commercial NOR type flash chip in 1988.
NOR-based flash has long erase and write times, but has a full address/data (memory) interface that allows random access to any location. This makes it suitable for storage of program code that needs to be infrequently updated, such as a computer's BIOS or the firmware of set-top boxes. Its endurance is 10,000 to 1,000,000 erase cycles. NOR-based flash was the basis of early flash-based removable media; Compact Flash was originally based on it, though later cards moved to the less expensive NAND flash.
NAND flash, which Toshiba announced at ISSCC in 1989, followed. It has faster erase and write times, higher density, and lower cost per bit than NOR flash, and ten times the endurance. However its I/O interface allows only sequential access to data. This makes it suitable for mass-storage devices such as PC cards and various memory cards, and somewhat less useful for computer memory. The first NAND-based removable media format was SmartMedia, and numerous others have followed: MMC, Secure Digital, Memory Stick and xD-Picture Cards. A new generation of these formats is becoming a reality with RS-MMC (Reduced Size MultiMedia Card), the TransFlash and miniSD variants of Secure Digital and the new USB/Memory card hybrid Intelligent Stick. The new formats exhibit a greatly reduced size, usually under 4 cm².
Limitations
One limitation of flash memory is that although it can be read or programmed a byte or a word at a time in a random access fashion, it must be erased a "block" at a time. Starting with a freshly erased block, any byte within that block can be programmed. However, once a byte has been programmed, it cannot be changed again until the entire block is erased. In other words, flash memory (specifically NOR flash) offers random-access read and programming operations, but cannot offer random-access rewrite or erase operations. When compared to a hard disk drive, a further limitation is the fact that flash memory has a finite number of erase-write cycles (most commercially available flash products are guaranteed to withstand 1 million programming cycles) so that care has to be taken when moving hard-drive based applications, such as operating systems, to flash-memory based devices such as CompactFlash. This effect is partially offset by some chip firmware or filesystem drivers by counting the writes and dynamically remapping the blocks in order to spread the write operations between the sectors, or by write verification and remapping to spare sectors in case of write failure.
The cost per byte of flash memory remains significantly higher than the corresponding cost of a hard disk drive, and that (on top of finite number of erase-write cycles previously mentioned) has prevented flash from becoming a solid state replacement for the hard disk drive on normal desktop and laptop computers.
Low-level access
Low-level access to a physical flash memory by device driver software is different from accessing common memories. Whereas a common RAM will simply respond to read and write operations by returning the contents or altering them immediately, flash memories need special considerations, especially when used as program memory akin to a read-only memory (ROM).
While reading data can be performed on individual addresses on NOR memories (not on NAND memories) unlocking (making available for erase or write), erasing and writing operations are performed block-wise on all flash memories. A typical block size will be 64, 128, or 256 KiB.
One group called Open NAND Flash Interface Working Group (ONFI) aims to develop a standardized low-level NAND Flash interface that allows interoperability between NAND devices from various vendors. The goals of this group include developing a standardized chip-level interface (pin-out) for NAND flash, a standard command set and a self identification mechanism (à la SDRAM's SPD EEPROM). The specification is expected to be available Fall 2006.
NOR memories
The read-only mode of NOR memories is similar to reading from a common memory, provided address and data bus is mapped correctly, so NOR flash memory is much like any address-mapped memory. NOR flash memories can be used as execute-in-place memory (XIP), meaning it behaves as a ROM memory mapped to a certain address. NOR flash memories have no intrinsic bad block management, so when a flash block is worn out, either the software using it has to handle this, or the device breaks.
When unlocking, erasing or writing NOR memories, special commands are written to the first page of the mapped memory. These commands are defined as the Common Flash memory Interface (defined by Intel) and the flash circuit will provide a list of all available commands to the physical driver.
Apart from being used as a ROM, the NOR memories can, of course, also be partitioned with a file system and used as any storage device.
NAND memories
NAND flash memories cannot provide execute-in-place due to their different construction principles. These memories are accessed much like block devices such as hard disks or memory cards. The blocks are typically 512 or 2048 bytes in size. Associated with each block are a few bytes (typically 12–16 bytes) that should be used for storage of an error detection and correction block checksum.
NAND devices typically have software-based bad block management. This means that when a logical block is accessed it is mapped to a physical block, and the device has a number of blocks set aside for compensating bad blocks and for storing primary and secondary mapping tables.
The error-correcting and detecting checksum will typically correct an error where one bit in the block is incorrect. When this happens, the block is marked bad in a logical block allocation table, and its (still undamaged) contents are copied to a new block and the logical block allocation table is altered accordingly. If more than one bit in the memory is corrupted, the contents are partly lost, i.e. it is no longer possible to reconstruct the original contents. Some devices may even come with a pre-programmed bad block table from the manufacturer, since it is sometimes impossible to manufacture error-free NAND memories.
The first error-free physical block (block 0) is always guaranteed to be readable and free from errors. Hence, all vital pointers for partitioning and bad block management for the device must be located inside this block (typically a pointer to the bad block tables etc). If the device is used for booting a system, this block must contain the master boot record.
When executing software from NAND memories, virtual memory strategies are used: memory contents must first be paged or copied into memory-mapped RAM and executed there. A memory management unit (MMU) in the system is helpful, but this can also be accomplished with overlays.
For this reason, some systems will use a combination of NOR and NAND memories, where a smaller NOR memory is used as software ROM and a larger NAND memory is partitioned with a file system for use as a random access storage area.
Flash file systems
Because of the particular characteristics of flash memory, it is best used with specifically designed file systems which spread writes over the media and deal with the long erase times of NOR flash blocks. The basic concept behind flash file systems is: When the flash store is to be updated, the file system will write a new copy of the changed data over to a fresh block, remap the file pointers, then erase the old block later when it has time. One of the earliest flash file systems was Microsoft's FFS2 (presumably preceded by FFS1), for use with MS-DOS in the early 1990s. Around 1994, the PCMCIA industry group approved the FTL (Flash Translation Layer) specification, which allowed a flash device to look like a FAT disk, but still have effective wear levelling. Other commercial systems such as FlashFX by Datalight were created to avoid patent concerns with FTL.
JFFS was the first flash-specific file system for Linux, but it was quickly superseded by JFFS2, originally developed for NOR flash. Then YAFFS was released in 2003, dealing specifically with NAND flash, and JFFS2 was updated to support NAND flash too. In practice, these filesystems are only used for embedded Flash memories which do not have a controller (known as Memory Technology Devices or just "mtd"). Removable flash media, such as SD and CF cards, is used with a controller (often built into the card) to perform wear-levelling and error correction, so use of JFFS2 or YAFFS does not add any benefit. These removable flash memory devices are often used with the old FAT filesystem for compatibility with cameras and other portable devices. Controllerless removable flash memory devices also exist; For example, SmartMedia is even electrically compatible with the Toshiba TC58 series of NAND flash chips.
Capacity
Common flash memory parts (individual internal components or "chips") range widely in capacity from kibibits to several gibibits each. The chips are often assembled together to achieve higher capacities for use in devices such as the iPod nano. The capacity of flash chips follows Moore's law because they are produced with the same processes used to manufacture other processors. However, there have also been jumps beyond Moore's law due to innovations in technology.
In 2005, Toshiba and SanDisk developed a NAND flash chip capable of storing 8 gibibits of data using MLC (multi-level cell) technology, capable of storing 2 bits of data per cell. In September 2005, Samsung Electronics announced that it had developed the world’s first 16 gibibit chip.[citation needed]
In March 2006, Samsung announced flash hard drives with a capacity of 32 gibibytes, essentially the same order of magnitude as smaller laptop hard drives, and in September of 2006, Samsung announced 32 gibibit chips produced using a 40 nm manufacturing process[1].
As of mid 2006, 256 MiB and smaller capacity flash memory has been largely discontinued, while 512 MiB capacity flash memory is being given a large discount to attract entry-level buyers. 1 GiB capacity flash memory has become the normal storage space for people who do not extensively use flash memory, while more and more consumers are adopting 2 GiB or 4 GiB flash drives.[citation needed]Hitachi (formerly the Hard disk unit of IBM) has a competing hard-drive mechanism, the Microdrive, that can fit inside the shell of a CompactFlash card. It has a capacity up to 8 GiB. BiTMicro offers a 155 GB 3.5" Solid-State disk named the "Edisk". [2]
Data Corruption & Recovery
The most common cause of data corruption is removal of the flash memory device while data is being written to it. The situation is aggravated by the usage of unsuitable file systems that are not designed for removable devices, or that are mounted async (where there is data still waiting to write when the device is removed).
Data recovery from flash memory devices can be achieved in some cases. Heuristic and Brute Force methods are examples of that may yield results for general data on a compact flash card.
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